Von Neumann
In the von Neumann
architecture CPU can either read an instruction or read/write data from/to the
memory. Both of these operations cannot occur simultaneously as the data and
instructions use the same system bus. This means that it is necessary to fetch
instruction and data from the same memory space, which limits bandwidth because
it can only transmit one piece of data or one instruction at a time.
Harvard Architecture
The most obvious characteristic of the
Harvard Architecture is that it has two different data buses to. The contacts are
CPU to RAM and CPU to ROM. Using these buses it is possible to access
program memory and data memory simultaneously. Typically, code (or program)
memory is read-only and data memory is read-write. A Harvard architecture
microcontroller can thus be faster for a given circuit complexity because
instruction fetches and data access do not contend for a single memory pathway.
Compare to von numann architecture Harvard Architecture can achieve higher
clock speeds; caches are useful as the memory speed is proportionally slower.
Harvard architectures tend to be targeted at higher performance systems, and so
caches are nearly always used in such systems. Harvard Micro processors can be
much faster than a von Neumann Micro processor because data and program do not
contend for the same information pathway, and storing the program in an
immutable read-only memory can result in vast reliability improvements.
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